Setting Mailbox and DPRAM base addresses:
I90 to I99 I-variables define: Mailbox addresses as 0x7FA000-0x7FA1FF and DPRAM addresses as 0x700000-0x703FFF at the VME A24 address space, interrupt level 2, and interrupt vectors 0xA0, 0xA1, and 0xA2.
| Description | Value | Comment | |
|---|---|---|---|
| VME Address Modifier | I90 | $39 | 24-bit addressing |
| VME Address Modifier Don't Care Bits | I91 | $4 | permits both "non-privileged" and "supervisory" data access |
| VME Base Address Bits A31-A24 | I92 | $0 | |
| VME Mailbox Base Address Bits A23-A16 | I93 | $7F | |
| VME Mailbox Base Address Bits A15-A08 | I94 | $A0 | |
| VME Interrupt Level | I95 | $2 | |
| VME Interrupt Vector | I96 | $A1 | |
| VME DPRAM Base Address Bits A23-A20 | I97 | $70 | |
| VME DPRAM Enable | I98 | $E0 | enables DPRAM |
| VME Address Width Control | I99 | $90 | DPRAM 24-bit addressing |
NOTE: The above VME settings must correspond to the driver configuration parameters in the IOC startup script st_pmac.cmd (see examples in the iocBoot directories):
### Configure PMAC-VME Hardware # args: (1) EPICS VME Card # # (2) PMAC Base Address # (3) PMAC DPRAM Address (0=none) # (4) PMAC IRQ Vectors (v must be odd) (uses v-1,v,v+1) # (5) IRQ Level pmacVmeDebug devPmacMbxDebug devPmacRamDebug drvPmacDebug # For 24-bit PMAC settings: # DPRAM address range is A24 0xF0700000 - 0xF0703FFF # MBOX address range is A24 0xF07FA000 - 0xF07FA1FF pmacVmeConfig (1, 0x7FA000, 0x700000, 0xa1, 2)
Some additional PMAC settings to allow proper EPICS communications with PMAC mailbox and DPRAM:
i47=20 // update period for motor data i48=1 // enable copying motor data i49=1 // enable copying C.S. data i50=40 // update period for C.S. data i55=1 // enable variable read buffer i56=1 // DPRAM ASCII Communications Interrupt Enable M100->X:$000000,0,24,S // servo clock M-variable